Summary
- NeuPro Ultra brings Ceva’s NPU architecture into data centre infrastructure applications.
- The technology targets inference processing and functions embedded within memory and connectivity systems.
- Early access is available, with wider IP availability expected in Q2 2027.
Ceva has introduced NeuPro Ultra, a licensable neural processing architecture designed for AI inference and specialised processing functions within data centre memory, connectivity, and data-handling systems.
The architecture extends the company’s semiconductor intellectual property portfolio into infrastructure applications, allowing chip designers to incorporate neural processing capabilities into their own devices.
NeuPro Ultra forms part of a new portfolio spanning four processing categories. NeuPro Nano targets low-power sensing, Prime addresses mainstream neural workloads, Max supports more demanding edge applications, and Ultra is designed for AI infrastructure.
The products share a common architecture and software development environment. Ceva intends this arrangement to help customers integrate processing capabilities across different semiconductor designs without maintaining entirely separate development systems.
NeuPro Ultra is available through an early-access programme, with general availability planned for the second quarter of 2027.
The product is semiconductor intellectual property rather than a finished data centre accelerator already being installed in commercial computing clusters.
Customers licensing the technology will still need to complete their own chip designs, validation, manufacturing, and integration before systems incorporating NeuPro Ultra can enter operation.
The data centre applications identified by Ceva include large language model inference and specialised processing associated with memory and networking hardware.
Modern AI systems can be constrained by the movement of information as well as by the number of calculations their processors can perform. Model parameters, intermediate results, and other data must be stored and transferred at rates appropriate to the processing workload.
Ceva’s approach is intended to allow chip developers to incorporate more processing intelligence into subsystems involved in those operations.
Depending on the implementation, specialised functions might be performed closer to where data is stored or transferred, potentially reducing some of the work allocated to central computing resources.
The practical benefit will depend on the hardware design and software environment. Additional processing functions consume silicon area and electricity, so their contribution must be assessed against the cost and efficiency of the complete system.
The new architecture supports lower-precision numerical formats, including FP4 and FP8, alongside features intended to assist with transformer-based model execution.
Lower numerical precision can reduce memory and processing requirements for compatible workloads, although model accuracy and efficiency depend on how the formats are applied.
NeuPro also supports techniques such as quantisation, compression, and pruning, which can reduce the amount of computation or data movement associated with supported model operations.
Ceva identifies dynamic tensor handling and key-value cache management among the capabilities relevant to more demanding inference workloads.
These features are associated with managing model operations and retained information, particularly when applications process many requests or longer sequences of data.
The company claims that its new portfolio can provide up to twice the AI throughput per square millimetre and a 50% improvement in energy efficiency compared with its first-generation technology.
Those figures relate to Ceva’s stated architectural comparisons. They do not establish equivalent improvements in the electricity consumption or throughput of an operating data centre.
The introduction of NeuPro Ultra expands the range of intellectual property available to semiconductor developers seeking to build AI capabilities into supporting infrastructure components.
Ceva also identifies support for pre-quantised models, which can allow developers to use existing model checkpoints without repeating every calibration stage. Whether that benefit is available in a product will depend on the software tools and hardware implementation used by the licence holder.
The architecture is designed to improve multiply-accumulate utilisation by reorganising tensors efficiently, and it supports mixture-of-experts and linear-attention networks. Those features respond to changing execution patterns as models become more varied and workloads place different demands on memory and processing.
Ceva says early engagements involve semiconductor and systems businesses evaluating the next-generation portfolio for future products. It has not identified a completed commercial data centre deployment of NeuPro Ultra, and the timetable for a chip integrating the licensed design will depend on the customer’s development programme.
The portfolio announcement covers intellectual property design and availability to developers. Any subsequent chip and system launch must be reported as a separate development, with its own engineering specifications and validation evidence.
Commercial adoption will depend on customers selecting the architecture, incorporating it into their silicon products, and completing the engineering and manufacturing required to bring those devices to market.
