Summary
- TNO Ventures is commercialising a microfluidic in-chip cooling platform for AI, HPC, and advanced semiconductor thermal loads.
- The platform uses evaporation in microscopic channels and is claimed to deliver up to 500 times more cooling power than conventional methods.
- Chip-level cooling points to future heat-flux limits that conventional cold plates and facility cooling loops may struggle to manage alone.
TNO is moving microfluidic chip-cooling technology towards commercial use, adding another layer to the thermal-management race created by AI and high-performance computing.
The Dutch research organisation’s ventures arm describes the MicroFluidic In-Chip Cooling platform as a way to cool chips from within, using evaporation in microscopic fluid channels. The technology is being aimed at artificial intelligence, high-performance data centres, advanced semiconductor applications, and telecom hardware, where heat flux is becoming harder to manage with conventional approaches.
TNO Ventures says the platform can deliver up to 500 times more cooling power than conventional methods by placing channels directly inside the chip and heat-spreading lid. Its portfolio page also says up to 80% of extracted heat can be recovered for reuse, including district heating applications, and that the technology has been demonstrated in telecom and AI hardware.
Thermal pressure moves down the stack
Most current data centre liquid-cooling deployments still operate at rack or server level. Direct-to-chip cold plates, coolant distribution units, manifolds, and facility water loops are becoming more common in high-density AI halls, but heat still has to move through several interfaces before it reaches the cooling loop. Microfluidic cooling shifts part of that work into the chip package itself.
That shift addresses a different class of problem. Higher rack power is already difficult for operators, but concentrated chip hotspots can become a performance limit even when the facility has enough cooling capacity on paper. If heat cannot be removed efficiently at the point of generation, processors may throttle, reliability can suffer, and the data centre may need lower coolant temperatures that increase energy or water demand elsewhere in the system.
TNO’s platform uses evaporation inside microscopic channels near the heat source. Two-phase cooling is not new, but putting it into chip-level structures changes the engineering questions. Manufacturing tolerances, fluid compatibility, contamination control, package reliability, maintenance, warranty boundaries, and integration with server OEM designs all become part of the commercial pathway.
Commercialisation will decide the pace
Research performance is only the first stage. Data centre hardware has to survive continuous utilisation, thermal cycling, long replacement windows, and maintenance regimes built around predictable failure modes. Any chip-level cooling system must fit into server production, support field service, and satisfy customers that a more complex thermal pathway will not introduce unacceptable operational risk.
A dedicated venture gives the technology a clearer route towards productisation, funding, industrial partners, and customer validation. It also creates a structure for working with chipmakers, server manufacturers, data centre operators, and cooling infrastructure suppliers. The market case is clear, but adoption will depend on system integration rather than laboratory performance alone.
The heat reuse claim also deserves engineering discipline. Higher-temperature liquid loops can make waste heat more useful, especially for district heating, industrial processes, or building services. Chip-level cooling could improve the quality of recoverable heat, but reuse still depends on site location, heat network access, seasonal demand, commercial agreements, and planning support. Efficient extraction creates the opportunity; local infrastructure decides whether the heat is used.
Europe has a strong interest in this layer of technology. The region is trying to expand AI infrastructure while facing grid, planning, and sustainability constraints in established data centre markets. Better thermal performance cannot create electricity capacity, but it can affect how much compute can be installed within a given electrical and mechanical envelope.
Microfluidic cooling will not replace direct-to-chip liquid-cooling systems in the near term. The current market is still being shaped by CDUs, facility water design, cold plates, controls, and operational procedures. TNO’s work points further ahead, towards a stage where the boundary between semiconductor packaging and data centre mechanical design becomes less clear.
As AI hardware roadmaps stretch rack power and chip heat flux, cooling will continue moving closer to the source. The plant room, the rack, the server, and the chip package are becoming parts of one thermal system.
